From PCB pattern transfer to packaging-substrate build-up, from laminates to process protection—every product line evolves inside the self-driving loop. Specs here are not static datasheets; they are living R&D pipelines.
Pattern transfer—the critical gate for PCB miniaturization.
Core photoresist material for inner- and outer-layer PCB pattern transfer. The AI loop continuously optimizes the multi-objective balance of resolution, adhesion, sensitivity, and stripability: compatible with LDI direct imaging, covering standard rigid boards, HDI, and mSAP/SAP fine-line scenarios, giving headroom as line widths keep shrinking.
From build-up dielectrics to bonding and load-bearing—the structural cornerstone of substrates and multilayer boards.
Build-up dielectric film for packaging substrates, benchmarked against ABF-class technology: low CTE, low-roughness copper interface, laser-via and desmear compatible, lead-free reflow resistant. Aimed at FCBGA and other large, high-layer-count substrates—the key foundation material for AI compute chip packaging.
Prepreg for multilayer lamination: resin flow, gel time, and cure window are precisely controlled, with online thickness-uniformity closed-loop management. Covers standard epoxy systems and low-Dk/Df high-speed systems (hydrocarbon and other low-polarity resin directions).
Rigid copper clad laminate product line: from standard FR-4 to high-speed/low-loss grades (low dielectric constant and low dissipation factor), serving high-speed interconnect needs in servers, switches, and communication equipment.
The invisible supporting roles that decide the visible yield.
UV-curable release-protection tape: high tack during application, sharp peel-force drop after UV exposure, and clean release without residue. Used for temporary fixation and protection in wafer grinding/dicing and packaging processes.
Low peel-voltage (low-electrostatic peel) protective film: the electrostatic voltage at the moment of peel is kept significantly low, preventing ESD damage to sensitive devices. For protection of optical components, displays, and precision electronics.
| Product line | Key metrics | Our approach |
|---|---|---|
| Photosensitive dry film | Resolution, adhesion, sensitivity, stripping window | Model-directed resin / photoinitiator search, high-throughput exposure-evaluation loop |
| BDF build-up dielectric film | CTE, interface roughness, laser-via compatibility, reflow tolerance | Interfacial chemistry design + multiscale simulation + pilot-harness scale-up |
| Prepreg / CCL | Dk/Df, resin flow, cure window, thickness uniformity | Low-polarity backbone molecular design, online SPC data feeding back into models |
| UV release tape / protective film | Peel-force curve, residue, peel voltage, ESD protection | Adhesive formulation DOE with high-throughput screening, peel-dynamics modeling |
AI training supernodes and inference servers: BDF build-up dielectrics, high-speed laminates, and the full dry film / PP / CCL chain.
Base stations and network equipment: low-Dk/Df prepreg and CCL for high-frequency links.
Memory module packaging: BDF build-up dielectric paired with process protection films.
Smartphone and wearable HDI boards: photosensitive dry film for fine-line mass production.
Smart terminals and edge devices: consistent board-level material sets.
Industrial control, power, and instrumentation: temperature- and humidity-resistant PP/CCL plus process protection.
Automotive and avionics: vehicle-grade reliability in board-level materials.
Drones, UGVs, and robotics: lightweight without compromising reliability.
Space-rated low-loss substrates for integrated terrestrial–non-terrestrial 6G networks.
Wafer grinding/dicing and optical-component processes: UV release tape and low-peel-voltage protective film.